New DDR5 Industrial Grade DRAM Modules

DDR5 DRAM Solutions

The new DIMM channel architecture is updated with two independent 40-bit (32 data bits with eight ECC bits) subchannels per memory module (DIMM). With this new architecture, Cervoz DDR5 will significantly increase memory access efficiency and lower the latencies of data accesses for the memory controller.

Besides increased memory bandwidth, DDR5 will allow for individual memory chips up to 64Gbit in density, which is 4 time higher than DDR4's 16Gbit density maximum, enabling higher-capacity DIMMS.

DDR5 debuts at 4800MT/s, while DDR4 tops out at 3200MT/s, a 50% increase in bandwidth. In cadence with compute platform releases, DDR5 has planned performance increases that will scale to 6400MT/s, ideal for edge computing, IoT, 5G, surveillance, and industrial PC-related applications.

With on-die ECC (Error Correction Code), the DDR5 modules keep the system stable by self-correcting errors, effectively improving transmission reliability. ECC-enabled processors for servers and workstations feature the coding to correct single or multi-bit errors.